Atomera Breathes New Life into Moore’s Law for Power and Analog Electronics
30 Novembre 2021 - 3:00PM
Business Wire
MST-SP Technology Provides Significant Cost
Reduction for These Semiconductor Products
Atomera Incorporated (NASDAQ:ATOM), a
semiconductor materials and technology licensing company, today
announced the availability of its Mears Silicon Technology® Smart
Profile™ (MST-SP®) technology. MST-SP, an implementation of MST
designed for use on 5V power and analog electronics, is breathing
new life into Moore’s Law. Through a combination of atomic level
engineering and advanced material science, Atomera is squeezing
more capability and capacity out of today’s semiconductor
processes. The resulting improvements in power, performance and
area (PPA) — the standard measure of Moore’s Law — are effectively
enabling the industry to get smaller die size using the same
process node.
While digital chip technologies have benefitted greatly from
Moore’s Law, there is a significant market for Bipolar CMOS-DMOS
(BCD) semiconductors that are built today in legacy nodes ranging
from 40nm to 180nm. According to The McClean Report from IC
Insights, the major user of BCD processes is the Power Management
ICs (PMICs) sector, which had a market size of $14.6 billion in
2020 and is forecast to grow to $24.9 billion in 2025. The growth
can be attributed to the projected increase in mobile and other
devices that use sophisticated power management techniques. For
example, according to Hui He, an analyst at research firm Omdia, as
reported by the Wall Street Journal, “A typical 5G smartphone can
hold as many as eight power-management chips, compared with two to
three in a 4G phone.”
“I have worked in the analog and power device sector for a long
time and have witnessed firsthand the challenges to scaling these
devices compared to digital,” said Lou Hutter, principal at Lou
Hutter Consulting. “Combining this ‘scaling gap’ with the
increasing prevalence of these devices is certainly one of the
factors behind industry shortages we see in these devices.
Atomera’s MST-SP technology can significantly shrink the power
transistors that routinely occupy 40%-80% of the area in a PMIC,
which enables manufacturers to get 20% more die per wafer — and
with lower power consumption to boot.”
BCD technologies face more difficult scaling challenges than
their digital counterparts and as a result have not seen the
process node advances that digital chips have. While some market
leaders have introduced advanced BCD processes at the 40nm nodes,
most BCD devices are produced at older-generation process nodes.
MST-SP enables BCD PMIC manufacturers to get up to 20% more die per
wafer, enabling manufacturers to improve the profitability of
existing fabs and/or improve the return on their investments in new
processes and capacity.
“As PMICs continue to proliferate in everything that has a
battery or a USB connector, the cost and area of the PMIC device is
becoming a major challenge for OEMs,” said Scott Bibaud, president
and CEO, Atomera. “MST-SP improves performance which will keep
costs manageable while enabling OEMs to include ever-more
sophisticated power management techniques to extend battery life.
MST-SP is just one example of the PPA benefits made possible from
the 20 years of work Atomera has put into researching advanced
materials using atomic-level engineering.”
The challenge limiting the ability to transition BCD power
devices to smaller nodes has been sufficiently improving the
on-resistance for a given breakdown voltage while ensuring
reliability isn’t compromised. MST-SP provides two fundamental
benefits. One is on-state mobility, or higher Idlin, and the second
is an ability to control the doping with a degree of precision that
is not possible with other approaches. The doping benefits also
translate into improvements in the breakdown voltage as well as the
overall ability to scale the gate length lower without losing
breakdown voltage. The net effect is a 20% improvement in Idlin for
a given VDS max, a key reliability parameter for the lifetime of
the device.
The ability to scale the gate length while maintaining
reliability also addresses the key challenge in moving BCD power
devices to smaller nodes. By enabling a gate length shrink without
compromising the reliability of the power device, manufacturers can
take better advantage of a design rule shrink to reduce the overall
device pitch. For 5V PMIC this enables up to 20% more die per
wafer.
MST-SP is currently available to license for 5V power devices,
which is the predominant operating voltage for BCD PMIC devices
today. MST-SP can be customized to both higher- and lower-voltages
by Atomera’s engineering team.
About Atomera
Atomera Incorporated is a semiconductor materials and technology
licensing company focused on deploying its proprietary,
silicon-proven technology into the semiconductor industry. Atomera
has developed Mears Silicon Technology™ (MST®), which increases
performance and power efficiency in semiconductor transistors. MST
can be implemented using equipment already deployed in
semiconductor manufacturing facilities and is complementary to
other nano-scaling technologies in the semiconductor industry
roadmap. More information can be found at
www.atomera.com.
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version on businesswire.com: https://www.businesswire.com/news/home/20211130005186/en/
Justin Gillespie The Hoffman Agency t: (925)719-1097
jgillespie@hoffman.com
Jeff Lewis Senior VP Marketing and Business Development, Atomera
t: (408)442-5248 jlewis@atomera.com
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